The influence of SnO2 film thickness on electronic and dielectric behavior of Au/SnO2/p-Si structures

Abstract

A set of Au/ SnO2/p-Si MOS capacitors with various thicknesses of SnO2 interlayer has been prepared. The temperature and frequency dependence of electrical and dielectric behavior of the Au/SnO2/p-Si structures have been investigated. The non-linear behavior of ln (I) vs. ln (V) and ln (I/V) vs. V1/2 plots indicated that the thermoionic emission theory can be applied to evaluate junction parameters for the investigated MOS capacitors. Investigation of the effects of interlayer thicknesses on the various junction parameters indicated that the junction parameters such as barrier height, ideality factor, dielectric constant, dielectric loss and real and imaginary part of electrical modulus depend on the interlayer thickness. The increasing thickness of SnO2 layer leads to decreasing the reverse bias current and capacitance of the device. A close analysis of the frequency dependent dielectric behavior of the devices showed that real part of the dielectric function (ε*(ω) ) exhibits non-Debye type relaxation for all temperatures, the real part of the ε*(ω) displayed a step decrease at the frequency where the dielectric loss shows a relaxation peak. Interface properties of the fabricated structure were investigated by capacitance-voltage and conductance–voltage measurements. The observed peak in conductance/angular frequency versus logarithm of frequency plot and the shift of the peak position to higher frequency have been attributed to the presence of uniformly distributed interface trap states in the silicon band gap. Frequency and temperature dependence of the alternating current conductivity have been analyzed in terms of quantum mechanical tunneling and correlated barrier hopping models. We have found no results supporting the quantum mechanical tunneling model.